-- Copyright (C) 1991-2013 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files from any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.

-- VENDOR "Altera"
-- PROGRAM "Quartus II 64-Bit"
-- VERSION "Version 13.1.0 Build 162 10/23/2013 SJ Full Version"

-- DATE "05/13/2025 16:05:03"

-- 
-- Device: Altera EP3C40F780C8 Package FBGA780
-- 

-- 
-- This VHDL file should be used for ModelSim-Altera (VHDL) only
-- 

LIBRARY ALTERA;
LIBRARY CYCLONEIII;
LIBRARY IEEE;
USE ALTERA.ALTERA_PRIMITIVES_COMPONENTS.ALL;
USE CYCLONEIII.CYCLONEIII_COMPONENTS.ALL;
USE IEEE.STD_LOGIC_1164.ALL;

ENTITY 	led IS
    PORT (
	clk : IN std_logic;
	rst : IN std_logic;
	load : IN std_logic;
	in_data : IN std_logic_vector(15 DOWNTO 0);
	seg : BUFFER std_logic_vector(7 DOWNTO 0);
	sel : BUFFER std_logic_vector(2 DOWNTO 0)
	);
END led;

-- Design Ports Information
-- seg[0]	=>  Location: PIN_G16,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- seg[1]	=>  Location: PIN_G17,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- seg[2]	=>  Location: PIN_F18,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- seg[3]	=>  Location: PIN_G18,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- seg[4]	=>  Location: PIN_G15,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- seg[5]	=>  Location: PIN_G14,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- seg[6]	=>  Location: PIN_G12,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- seg[7]	=>  Location: PIN_M21,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- sel[0]	=>  Location: PIN_C22,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- sel[1]	=>  Location: PIN_D22,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- sel[2]	=>  Location: PIN_G9,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- clk	=>  Location: PIN_A14,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- rst	=>  Location: PIN_Y27,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- in_data[4]	=>  Location: PIN_K15,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- load	=>  Location: PIN_AH12,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- in_data[8]	=>  Location: PIN_H16,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- in_data[12]	=>  Location: PIN_B19,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- in_data[0]	=>  Location: PIN_C16,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- in_data[5]	=>  Location: PIN_F15,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- in_data[9]	=>  Location: PIN_E17,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- in_data[13]	=>  Location: PIN_H14,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- in_data[1]	=>  Location: PIN_D16,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- in_data[10]	=>  Location: PIN_A19,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- in_data[6]	=>  Location: PIN_J16,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- in_data[14]	=>  Location: PIN_D17,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- in_data[2]	=>  Location: PIN_A17,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- in_data[7]	=>  Location: PIN_B18,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- in_data[11]	=>  Location: PIN_A18,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- in_data[15]	=>  Location: PIN_B17,	 I/O Standard: 2.5 V,	 Current Strength: Default
-- in_data[3]	=>  Location: PIN_J17,	 I/O Standard: 2.5 V,	 Current Strength: Default


ARCHITECTURE structure OF led IS
SIGNAL gnd : std_logic := '0';
SIGNAL vcc : std_logic := '1';
SIGNAL unknown : std_logic := 'X';
SIGNAL devoe : std_logic := '1';
SIGNAL devclrn : std_logic := '1';
SIGNAL devpor : std_logic := '1';
SIGNAL ww_devoe : std_logic;
SIGNAL ww_devclrn : std_logic;
SIGNAL ww_devpor : std_logic;
SIGNAL ww_clk : std_logic;
SIGNAL ww_rst : std_logic;
SIGNAL ww_load : std_logic;
SIGNAL ww_in_data : std_logic_vector(15 DOWNTO 0);
SIGNAL ww_seg : std_logic_vector(7 DOWNTO 0);
SIGNAL ww_sel : std_logic_vector(2 DOWNTO 0);
SIGNAL \clk~inputclkctrl_INCLK_bus\ : std_logic_vector(3 DOWNTO 0);
SIGNAL \rst~inputclkctrl_INCLK_bus\ : std_logic_vector(3 DOWNTO 0);
SIGNAL \seg[0]~output_o\ : std_logic;
SIGNAL \seg[1]~output_o\ : std_logic;
SIGNAL \seg[2]~output_o\ : std_logic;
SIGNAL \seg[3]~output_o\ : std_logic;
SIGNAL \seg[4]~output_o\ : std_logic;
SIGNAL \seg[5]~output_o\ : std_logic;
SIGNAL \seg[6]~output_o\ : std_logic;
SIGNAL \seg[7]~output_o\ : std_logic;
SIGNAL \sel[0]~output_o\ : std_logic;
SIGNAL \sel[1]~output_o\ : std_logic;
SIGNAL \sel[2]~output_o\ : std_logic;
SIGNAL \clk~input_o\ : std_logic;
SIGNAL \clk~inputclkctrl_outclk\ : std_logic;
SIGNAL \data[0]~16_combout\ : std_logic;
SIGNAL \in_data[0]~input_o\ : std_logic;
SIGNAL \rst~input_o\ : std_logic;
SIGNAL \rst~inputclkctrl_outclk\ : std_logic;
SIGNAL \load~input_o\ : std_logic;
SIGNAL \Add1~0_combout\ : std_logic;
SIGNAL \Add1~1\ : std_logic;
SIGNAL \Add1~2_combout\ : std_logic;
SIGNAL \Add1~3\ : std_logic;
SIGNAL \Add1~4_combout\ : std_logic;
SIGNAL \Add1~5\ : std_logic;
SIGNAL \Add1~6_combout\ : std_logic;
SIGNAL \Add1~7\ : std_logic;
SIGNAL \Add1~8_combout\ : std_logic;
SIGNAL \Add1~9\ : std_logic;
SIGNAL \Add1~10_combout\ : std_logic;
SIGNAL \cnt~5_combout\ : std_logic;
SIGNAL \Add1~11\ : std_logic;
SIGNAL \Add1~12_combout\ : std_logic;
SIGNAL \Add1~13\ : std_logic;
SIGNAL \Add1~14_combout\ : std_logic;
SIGNAL \cnt~4_combout\ : std_logic;
SIGNAL \Add1~15\ : std_logic;
SIGNAL \Add1~16_combout\ : std_logic;
SIGNAL \Add1~17\ : std_logic;
SIGNAL \Add1~18_combout\ : std_logic;
SIGNAL \cnt~3_combout\ : std_logic;
SIGNAL \Add1~19\ : std_logic;
SIGNAL \Add1~20_combout\ : std_logic;
SIGNAL \cnt~2_combout\ : std_logic;
SIGNAL \Add1~21\ : std_logic;
SIGNAL \Add1~22_combout\ : std_logic;
SIGNAL \Add1~23\ : std_logic;
SIGNAL \Add1~24_combout\ : std_logic;
SIGNAL \Add1~25\ : std_logic;
SIGNAL \Add1~26_combout\ : std_logic;
SIGNAL \Equal0~1_combout\ : std_logic;
SIGNAL \Add1~27\ : std_logic;
SIGNAL \Add1~28_combout\ : std_logic;
SIGNAL \Add1~29\ : std_logic;
SIGNAL \Add1~30_combout\ : std_logic;
SIGNAL \cnt~1_combout\ : std_logic;
SIGNAL \Add1~31\ : std_logic;
SIGNAL \Add1~32_combout\ : std_logic;
SIGNAL \cnt~0_combout\ : std_logic;
SIGNAL \Equal0~0_combout\ : std_logic;
SIGNAL \Equal0~2_combout\ : std_logic;
SIGNAL \Equal0~3_combout\ : std_logic;
SIGNAL \Equal0~4_combout\ : std_logic;
SIGNAL \data[8]~26_combout\ : std_logic;
SIGNAL \data[0]~17\ : std_logic;
SIGNAL \data[1]~18_combout\ : std_logic;
SIGNAL \in_data[1]~input_o\ : std_logic;
SIGNAL \data[1]~19\ : std_logic;
SIGNAL \data[2]~20_combout\ : std_logic;
SIGNAL \in_data[2]~input_o\ : std_logic;
SIGNAL \u_display|sel[0]~2_combout\ : std_logic;
SIGNAL \u_display|sel[1]~1_combout\ : std_logic;
SIGNAL \data[2]~21\ : std_logic;
SIGNAL \data[3]~22_combout\ : std_logic;
SIGNAL \in_data[3]~input_o\ : std_logic;
SIGNAL \data[3]~23\ : std_logic;
SIGNAL \data[4]~24_combout\ : std_logic;
SIGNAL \in_data[4]~input_o\ : std_logic;
SIGNAL \data[4]~25\ : std_logic;
SIGNAL \data[5]~27_combout\ : std_logic;
SIGNAL \in_data[5]~input_o\ : std_logic;
SIGNAL \data[5]~28\ : std_logic;
SIGNAL \data[6]~29_combout\ : std_logic;
SIGNAL \in_data[6]~input_o\ : std_logic;
SIGNAL \data[6]~30\ : std_logic;
SIGNAL \data[7]~31_combout\ : std_logic;
SIGNAL \in_data[7]~input_o\ : std_logic;
SIGNAL \data[7]~32\ : std_logic;
SIGNAL \data[8]~33_combout\ : std_logic;
SIGNAL \in_data[8]~input_o\ : std_logic;
SIGNAL \data[8]~34\ : std_logic;
SIGNAL \data[9]~35_combout\ : std_logic;
SIGNAL \in_data[9]~input_o\ : std_logic;
SIGNAL \data[9]~36\ : std_logic;
SIGNAL \data[10]~37_combout\ : std_logic;
SIGNAL \in_data[10]~input_o\ : std_logic;
SIGNAL \data[10]~38\ : std_logic;
SIGNAL \data[11]~39_combout\ : std_logic;
SIGNAL \in_data[11]~input_o\ : std_logic;
SIGNAL \data[11]~40\ : std_logic;
SIGNAL \data[12]~41_combout\ : std_logic;
SIGNAL \in_data[12]~input_o\ : std_logic;
SIGNAL \data[12]~42\ : std_logic;
SIGNAL \data[13]~43_combout\ : std_logic;
SIGNAL \in_data[13]~input_o\ : std_logic;
SIGNAL \data[13]~44\ : std_logic;
SIGNAL \data[14]~45_combout\ : std_logic;
SIGNAL \in_data[14]~input_o\ : std_logic;
SIGNAL \u_display|Mux1~0_combout\ : std_logic;
SIGNAL \u_display|Mux1~1_combout\ : std_logic;
SIGNAL \u_display|sel[2]~0_combout\ : std_logic;
SIGNAL \u_display|Mux1~2_combout\ : std_logic;
SIGNAL \u_display|Mux3~0_combout\ : std_logic;
SIGNAL \u_display|Mux3~1_combout\ : std_logic;
SIGNAL \u_display|Mux3~2_combout\ : std_logic;
SIGNAL \data[14]~46\ : std_logic;
SIGNAL \data[15]~47_combout\ : std_logic;
SIGNAL \in_data[15]~input_o\ : std_logic;
SIGNAL \u_display|Mux0~0_combout\ : std_logic;
SIGNAL \u_display|Mux0~1_combout\ : std_logic;
SIGNAL \u_display|Mux0~2_combout\ : std_logic;
SIGNAL \u_display|Mux2~0_combout\ : std_logic;
SIGNAL \u_display|Mux2~1_combout\ : std_logic;
SIGNAL \u_display|Mux2~2_combout\ : std_logic;
SIGNAL \u_display|WideOr6~0_combout\ : std_logic;
SIGNAL \u_display|WideOr6~1_combout\ : std_logic;
SIGNAL \u_display|WideOr5~0_combout\ : std_logic;
SIGNAL \u_display|WideOr5~1_combout\ : std_logic;
SIGNAL \u_display|WideOr4~0_combout\ : std_logic;
SIGNAL \u_display|WideOr4~1_combout\ : std_logic;
SIGNAL \u_display|WideOr3~0_combout\ : std_logic;
SIGNAL \u_display|WideOr3~1_combout\ : std_logic;
SIGNAL \u_display|WideOr2~0_combout\ : std_logic;
SIGNAL \u_display|WideOr2~1_combout\ : std_logic;
SIGNAL \u_display|WideOr1~0_combout\ : std_logic;
SIGNAL \u_display|WideOr1~1_combout\ : std_logic;
SIGNAL \u_display|WideOr0~0_combout\ : std_logic;
SIGNAL data : std_logic_vector(15 DOWNTO 0);
SIGNAL cnt : std_logic_vector(16 DOWNTO 0);
SIGNAL \u_display|sel\ : std_logic_vector(2 DOWNTO 0);
SIGNAL \ALT_INV_load~input_o\ : std_logic;

BEGIN

ww_clk <= clk;
ww_rst <= rst;
ww_load <= load;
ww_in_data <= in_data;
seg <= ww_seg;
sel <= ww_sel;
ww_devoe <= devoe;
ww_devclrn <= devclrn;
ww_devpor <= devpor;

\clk~inputclkctrl_INCLK_bus\ <= (vcc & vcc & vcc & \clk~input_o\);

\rst~inputclkctrl_INCLK_bus\ <= (vcc & vcc & vcc & \rst~input_o\);
\ALT_INV_load~input_o\ <= NOT \load~input_o\;

-- Location: IOOBUF_X43_Y43_N30
\seg[0]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \u_display|WideOr6~1_combout\,
	devoe => ww_devoe,
	o => \seg[0]~output_o\);

-- Location: IOOBUF_X50_Y43_N23
\seg[1]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \u_display|WideOr5~1_combout\,
	devoe => ww_devoe,
	o => \seg[1]~output_o\);

-- Location: IOOBUF_X54_Y43_N16
\seg[2]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \u_display|WideOr4~1_combout\,
	devoe => ww_devoe,
	o => \seg[2]~output_o\);

-- Location: IOOBUF_X48_Y43_N16
\seg[3]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \u_display|WideOr3~1_combout\,
	devoe => ww_devoe,
	o => \seg[3]~output_o\);

-- Location: IOOBUF_X41_Y43_N9
\seg[4]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \u_display|WideOr2~1_combout\,
	devoe => ww_devoe,
	o => \seg[4]~output_o\);

-- Location: IOOBUF_X29_Y43_N23
\seg[5]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \u_display|WideOr1~1_combout\,
	devoe => ww_devoe,
	o => \seg[5]~output_o\);

-- Location: IOOBUF_X11_Y43_N16
\seg[6]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \u_display|WideOr0~0_combout\,
	devoe => ww_devoe,
	o => \seg[6]~output_o\);

-- Location: IOOBUF_X67_Y35_N2
\seg[7]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => GND,
	devoe => ww_devoe,
	o => \seg[7]~output_o\);

-- Location: IOOBUF_X56_Y43_N30
\sel[0]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \u_display|sel\(0),
	devoe => ww_devoe,
	o => \sel[0]~output_o\);

-- Location: IOOBUF_X65_Y43_N16
\sel[1]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \u_display|sel\(1),
	devoe => ww_devoe,
	o => \sel[1]~output_o\);

-- Location: IOOBUF_X5_Y43_N16
\sel[2]~output\ : cycloneiii_io_obuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	open_drain_output => "false")
-- pragma translate_on
PORT MAP (
	i => \u_display|sel\(2),
	devoe => ww_devoe,
	o => \sel[2]~output_o\);

-- Location: IOIBUF_X34_Y43_N15
\clk~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_clk,
	o => \clk~input_o\);

-- Location: CLKCTRL_G14
\clk~inputclkctrl\ : cycloneiii_clkctrl
-- pragma translate_off
GENERIC MAP (
	clock_type => "global clock",
	ena_register_mode => "none")
-- pragma translate_on
PORT MAP (
	inclk => \clk~inputclkctrl_INCLK_bus\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	outclk => \clk~inputclkctrl_outclk\);

-- Location: LCCOMB_X43_Y41_N0
\data[0]~16\ : cycloneiii_lcell_comb
-- Equation(s):
-- \data[0]~16_combout\ = data(0) $ (VCC)
-- \data[0]~17\ = CARRY(data(0))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011001111001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => data(0),
	datad => VCC,
	combout => \data[0]~16_combout\,
	cout => \data[0]~17\);

-- Location: IOIBUF_X41_Y43_N15
\in_data[0]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_in_data(0),
	o => \in_data[0]~input_o\);

-- Location: IOIBUF_X67_Y22_N15
\rst~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_rst,
	o => \rst~input_o\);

-- Location: CLKCTRL_G9
\rst~inputclkctrl\ : cycloneiii_clkctrl
-- pragma translate_off
GENERIC MAP (
	clock_type => "global clock",
	ena_register_mode => "none")
-- pragma translate_on
PORT MAP (
	inclk => \rst~inputclkctrl_INCLK_bus\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	outclk => \rst~inputclkctrl_outclk\);

-- Location: IOIBUF_X22_Y0_N1
\load~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_load,
	o => \load~input_o\);

-- Location: LCCOMB_X44_Y42_N16
\Add1~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add1~0_combout\ = cnt(0) $ (VCC)
-- \Add1~1\ = CARRY(cnt(0))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011001111001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => cnt(0),
	datad => VCC,
	combout => \Add1~0_combout\,
	cout => \Add1~1\);

-- Location: FF_X44_Y42_N17
\cnt[0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Add1~0_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \ALT_INV_load~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => cnt(0));

-- Location: LCCOMB_X44_Y42_N18
\Add1~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add1~2_combout\ = (cnt(1) & (!\Add1~1\)) # (!cnt(1) & ((\Add1~1\) # (GND)))
-- \Add1~3\ = CARRY((!\Add1~1\) # (!cnt(1)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110000111111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => cnt(1),
	datad => VCC,
	cin => \Add1~1\,
	combout => \Add1~2_combout\,
	cout => \Add1~3\);

-- Location: FF_X44_Y42_N19
\cnt[1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Add1~2_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \ALT_INV_load~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => cnt(1));

-- Location: LCCOMB_X44_Y42_N20
\Add1~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add1~4_combout\ = (cnt(2) & (\Add1~3\ $ (GND))) # (!cnt(2) & (!\Add1~3\ & VCC))
-- \Add1~5\ = CARRY((cnt(2) & !\Add1~3\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => cnt(2),
	datad => VCC,
	cin => \Add1~3\,
	combout => \Add1~4_combout\,
	cout => \Add1~5\);

-- Location: FF_X44_Y42_N21
\cnt[2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Add1~4_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \ALT_INV_load~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => cnt(2));

-- Location: LCCOMB_X44_Y42_N22
\Add1~6\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add1~6_combout\ = (cnt(3) & (!\Add1~5\)) # (!cnt(3) & ((\Add1~5\) # (GND)))
-- \Add1~7\ = CARRY((!\Add1~5\) # (!cnt(3)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => cnt(3),
	datad => VCC,
	cin => \Add1~5\,
	combout => \Add1~6_combout\,
	cout => \Add1~7\);

-- Location: FF_X44_Y42_N23
\cnt[3]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Add1~6_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \ALT_INV_load~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => cnt(3));

-- Location: LCCOMB_X44_Y42_N24
\Add1~8\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add1~8_combout\ = (cnt(4) & (\Add1~7\ $ (GND))) # (!cnt(4) & (!\Add1~7\ & VCC))
-- \Add1~9\ = CARRY((cnt(4) & !\Add1~7\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010010100001010",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => cnt(4),
	datad => VCC,
	cin => \Add1~7\,
	combout => \Add1~8_combout\,
	cout => \Add1~9\);

-- Location: FF_X44_Y42_N25
\cnt[4]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Add1~8_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \ALT_INV_load~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => cnt(4));

-- Location: LCCOMB_X44_Y42_N26
\Add1~10\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add1~10_combout\ = (cnt(5) & (!\Add1~9\)) # (!cnt(5) & ((\Add1~9\) # (GND)))
-- \Add1~11\ = CARRY((!\Add1~9\) # (!cnt(5)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110000111111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => cnt(5),
	datad => VCC,
	cin => \Add1~9\,
	combout => \Add1~10_combout\,
	cout => \Add1~11\);

-- Location: LCCOMB_X44_Y42_N6
\cnt~5\ : cycloneiii_lcell_comb
-- Equation(s):
-- \cnt~5_combout\ = (\Add1~10_combout\ & ((\Equal0~4_combout\) # (!cnt(1))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => cnt(1),
	datac => \Add1~10_combout\,
	datad => \Equal0~4_combout\,
	combout => \cnt~5_combout\);

-- Location: FF_X44_Y42_N7
\cnt[5]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \cnt~5_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \ALT_INV_load~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => cnt(5));

-- Location: LCCOMB_X44_Y42_N28
\Add1~12\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add1~12_combout\ = (cnt(6) & (\Add1~11\ $ (GND))) # (!cnt(6) & (!\Add1~11\ & VCC))
-- \Add1~13\ = CARRY((cnt(6) & !\Add1~11\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => cnt(6),
	datad => VCC,
	cin => \Add1~11\,
	combout => \Add1~12_combout\,
	cout => \Add1~13\);

-- Location: FF_X44_Y42_N29
\cnt[6]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Add1~12_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \ALT_INV_load~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => cnt(6));

-- Location: LCCOMB_X44_Y42_N30
\Add1~14\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add1~14_combout\ = (cnt(7) & (!\Add1~13\)) # (!cnt(7) & ((\Add1~13\) # (GND)))
-- \Add1~15\ = CARRY((!\Add1~13\) # (!cnt(7)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110000111111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => cnt(7),
	datad => VCC,
	cin => \Add1~13\,
	combout => \Add1~14_combout\,
	cout => \Add1~15\);

-- Location: LCCOMB_X44_Y42_N4
\cnt~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \cnt~4_combout\ = (\Add1~14_combout\ & ((\Equal0~4_combout\) # (!cnt(1))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => cnt(1),
	datac => \Add1~14_combout\,
	datad => \Equal0~4_combout\,
	combout => \cnt~4_combout\);

-- Location: FF_X44_Y42_N5
\cnt[7]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \cnt~4_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \ALT_INV_load~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => cnt(7));

-- Location: LCCOMB_X44_Y41_N0
\Add1~16\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add1~16_combout\ = (cnt(8) & (\Add1~15\ $ (GND))) # (!cnt(8) & (!\Add1~15\ & VCC))
-- \Add1~17\ = CARRY((cnt(8) & !\Add1~15\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010010100001010",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => cnt(8),
	datad => VCC,
	cin => \Add1~15\,
	combout => \Add1~16_combout\,
	cout => \Add1~17\);

-- Location: FF_X44_Y41_N1
\cnt[8]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Add1~16_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \ALT_INV_load~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => cnt(8));

-- Location: LCCOMB_X44_Y41_N2
\Add1~18\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add1~18_combout\ = (cnt(9) & (!\Add1~17\)) # (!cnt(9) & ((\Add1~17\) # (GND)))
-- \Add1~19\ = CARRY((!\Add1~17\) # (!cnt(9)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110000111111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => cnt(9),
	datad => VCC,
	cin => \Add1~17\,
	combout => \Add1~18_combout\,
	cout => \Add1~19\);

-- Location: LCCOMB_X44_Y41_N24
\cnt~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \cnt~3_combout\ = (\Add1~18_combout\ & ((\Equal0~4_combout\) # (!cnt(1))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111001100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => cnt(1),
	datac => \Equal0~4_combout\,
	datad => \Add1~18_combout\,
	combout => \cnt~3_combout\);

-- Location: FF_X44_Y41_N25
\cnt[9]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \cnt~3_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \ALT_INV_load~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => cnt(9));

-- Location: LCCOMB_X44_Y41_N4
\Add1~20\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add1~20_combout\ = (cnt(10) & (\Add1~19\ $ (GND))) # (!cnt(10) & (!\Add1~19\ & VCC))
-- \Add1~21\ = CARRY((cnt(10) & !\Add1~19\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => cnt(10),
	datad => VCC,
	cin => \Add1~19\,
	combout => \Add1~20_combout\,
	cout => \Add1~21\);

-- Location: LCCOMB_X45_Y41_N22
\cnt~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \cnt~2_combout\ = (\Add1~20_combout\ & ((\Equal0~4_combout\) # (!cnt(1))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => cnt(1),
	datac => \Add1~20_combout\,
	datad => \Equal0~4_combout\,
	combout => \cnt~2_combout\);

-- Location: FF_X45_Y41_N23
\cnt[10]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \cnt~2_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \ALT_INV_load~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => cnt(10));

-- Location: LCCOMB_X44_Y41_N6
\Add1~22\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add1~22_combout\ = (cnt(11) & (!\Add1~21\)) # (!cnt(11) & ((\Add1~21\) # (GND)))
-- \Add1~23\ = CARRY((!\Add1~21\) # (!cnt(11)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => cnt(11),
	datad => VCC,
	cin => \Add1~21\,
	combout => \Add1~22_combout\,
	cout => \Add1~23\);

-- Location: FF_X44_Y41_N7
\cnt[11]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Add1~22_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \ALT_INV_load~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => cnt(11));

-- Location: LCCOMB_X44_Y41_N8
\Add1~24\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add1~24_combout\ = (cnt(12) & (\Add1~23\ $ (GND))) # (!cnt(12) & (!\Add1~23\ & VCC))
-- \Add1~25\ = CARRY((cnt(12) & !\Add1~23\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010010100001010",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => cnt(12),
	datad => VCC,
	cin => \Add1~23\,
	combout => \Add1~24_combout\,
	cout => \Add1~25\);

-- Location: FF_X44_Y41_N9
\cnt[12]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Add1~24_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \ALT_INV_load~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => cnt(12));

-- Location: LCCOMB_X44_Y41_N10
\Add1~26\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add1~26_combout\ = (cnt(13) & (!\Add1~25\)) # (!cnt(13) & ((\Add1~25\) # (GND)))
-- \Add1~27\ = CARRY((!\Add1~25\) # (!cnt(13)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => cnt(13),
	datad => VCC,
	cin => \Add1~25\,
	combout => \Add1~26_combout\,
	cout => \Add1~27\);

-- Location: FF_X44_Y41_N11
\cnt[13]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Add1~26_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \ALT_INV_load~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => cnt(13));

-- Location: LCCOMB_X44_Y41_N30
\Equal0~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Equal0~1_combout\ = (cnt(13)) # (((cnt(12)) # (cnt(11))) # (!cnt(10)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111111111011",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => cnt(13),
	datab => cnt(10),
	datac => cnt(12),
	datad => cnt(11),
	combout => \Equal0~1_combout\);

-- Location: LCCOMB_X44_Y41_N12
\Add1~28\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add1~28_combout\ = (cnt(14) & (\Add1~27\ $ (GND))) # (!cnt(14) & (!\Add1~27\ & VCC))
-- \Add1~29\ = CARRY((cnt(14) & !\Add1~27\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010010100001010",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => cnt(14),
	datad => VCC,
	cin => \Add1~27\,
	combout => \Add1~28_combout\,
	cout => \Add1~29\);

-- Location: FF_X44_Y41_N13
\cnt[14]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \Add1~28_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \ALT_INV_load~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => cnt(14));

-- Location: LCCOMB_X44_Y41_N14
\Add1~30\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add1~30_combout\ = (cnt(15) & (!\Add1~29\)) # (!cnt(15) & ((\Add1~29\) # (GND)))
-- \Add1~31\ = CARRY((!\Add1~29\) # (!cnt(15)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110000111111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => cnt(15),
	datad => VCC,
	cin => \Add1~29\,
	combout => \Add1~30_combout\,
	cout => \Add1~31\);

-- Location: LCCOMB_X45_Y41_N28
\cnt~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \cnt~1_combout\ = (\Add1~30_combout\ & ((\Equal0~4_combout\) # (!cnt(1))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \Equal0~4_combout\,
	datac => cnt(1),
	datad => \Add1~30_combout\,
	combout => \cnt~1_combout\);

-- Location: FF_X45_Y41_N29
\cnt[15]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \cnt~1_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \ALT_INV_load~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => cnt(15));

-- Location: LCCOMB_X44_Y41_N16
\Add1~32\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Add1~32_combout\ = cnt(16) $ (!\Add1~31\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010010110100101",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => cnt(16),
	cin => \Add1~31\,
	combout => \Add1~32_combout\);

-- Location: LCCOMB_X44_Y41_N22
\cnt~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \cnt~0_combout\ = (\Add1~32_combout\ & ((\Equal0~4_combout\) # (!cnt(1))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111001100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => cnt(1),
	datac => \Equal0~4_combout\,
	datad => \Add1~32_combout\,
	combout => \cnt~0_combout\);

-- Location: FF_X44_Y41_N23
\cnt[16]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \cnt~0_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	ena => \ALT_INV_load~input_o\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => cnt(16));

-- Location: LCCOMB_X44_Y41_N20
\Equal0~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Equal0~0_combout\ = (cnt(14)) # (((!cnt(0)) # (!cnt(16))) # (!cnt(15)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011111111111111",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => cnt(14),
	datab => cnt(15),
	datac => cnt(16),
	datad => cnt(0),
	combout => \Equal0~0_combout\);

-- Location: LCCOMB_X44_Y41_N26
\Equal0~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Equal0~2_combout\ = (cnt(8)) # (((cnt(6)) # (!cnt(7))) # (!cnt(9)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111101111111111",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => cnt(8),
	datab => cnt(9),
	datac => cnt(6),
	datad => cnt(7),
	combout => \Equal0~2_combout\);

-- Location: LCCOMB_X44_Y42_N0
\Equal0~3\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Equal0~3_combout\ = (cnt(5)) # (((!cnt(4)) # (!cnt(3))) # (!cnt(2)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011111111111111",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => cnt(5),
	datab => cnt(2),
	datac => cnt(3),
	datad => cnt(4),
	combout => \Equal0~3_combout\);

-- Location: LCCOMB_X44_Y41_N28
\Equal0~4\ : cycloneiii_lcell_comb
-- Equation(s):
-- \Equal0~4_combout\ = (\Equal0~1_combout\) # ((\Equal0~0_combout\) # ((\Equal0~2_combout\) # (\Equal0~3_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111111111111110",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \Equal0~1_combout\,
	datab => \Equal0~0_combout\,
	datac => \Equal0~2_combout\,
	datad => \Equal0~3_combout\,
	combout => \Equal0~4_combout\);

-- Location: LCCOMB_X44_Y41_N18
\data[8]~26\ : cycloneiii_lcell_comb
-- Equation(s):
-- \data[8]~26_combout\ = (\load~input_o\) # ((cnt(1) & !\Equal0~4_combout\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100110011111100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \load~input_o\,
	datac => cnt(1),
	datad => \Equal0~4_combout\,
	combout => \data[8]~26_combout\);

-- Location: FF_X43_Y41_N1
\data[0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \data[0]~16_combout\,
	asdata => \in_data[0]~input_o\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => \load~input_o\,
	ena => \data[8]~26_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => data(0));

-- Location: LCCOMB_X43_Y41_N2
\data[1]~18\ : cycloneiii_lcell_comb
-- Equation(s):
-- \data[1]~18_combout\ = (data(1) & (!\data[0]~17\)) # (!data(1) & ((\data[0]~17\) # (GND)))
-- \data[1]~19\ = CARRY((!\data[0]~17\) # (!data(1)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110000111111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => data(1),
	datad => VCC,
	cin => \data[0]~17\,
	combout => \data[1]~18_combout\,
	cout => \data[1]~19\);

-- Location: IOIBUF_X38_Y43_N1
\in_data[1]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_in_data(1),
	o => \in_data[1]~input_o\);

-- Location: FF_X43_Y41_N3
\data[1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \data[1]~18_combout\,
	asdata => \in_data[1]~input_o\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => \load~input_o\,
	ena => \data[8]~26_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => data(1));

-- Location: LCCOMB_X43_Y41_N4
\data[2]~20\ : cycloneiii_lcell_comb
-- Equation(s):
-- \data[2]~20_combout\ = (data(2) & (\data[1]~19\ $ (GND))) # (!data(2) & (!\data[1]~19\ & VCC))
-- \data[2]~21\ = CARRY((data(2) & !\data[1]~19\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => data(2),
	datad => VCC,
	cin => \data[1]~19\,
	combout => \data[2]~20_combout\,
	cout => \data[2]~21\);

-- Location: IOIBUF_X38_Y43_N22
\in_data[2]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_in_data(2),
	o => \in_data[2]~input_o\);

-- Location: FF_X43_Y41_N5
\data[2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \data[2]~20_combout\,
	asdata => \in_data[2]~input_o\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => \load~input_o\,
	ena => \data[8]~26_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => data(2));

-- Location: LCCOMB_X42_Y41_N24
\u_display|sel[0]~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \u_display|sel[0]~2_combout\ = !\u_display|sel\(0)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000111100001111",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \u_display|sel\(0),
	combout => \u_display|sel[0]~2_combout\);

-- Location: FF_X42_Y41_N25
\u_display|sel[0]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \u_display|sel[0]~2_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \u_display|sel\(0));

-- Location: LCCOMB_X42_Y41_N6
\u_display|sel[1]~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \u_display|sel[1]~1_combout\ = \u_display|sel\(1) $ (\u_display|sel\(0))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000111111110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \u_display|sel\(1),
	datad => \u_display|sel\(0),
	combout => \u_display|sel[1]~1_combout\);

-- Location: FF_X42_Y41_N7
\u_display|sel[1]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \u_display|sel[1]~1_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \u_display|sel\(1));

-- Location: LCCOMB_X43_Y41_N6
\data[3]~22\ : cycloneiii_lcell_comb
-- Equation(s):
-- \data[3]~22_combout\ = (data(3) & (!\data[2]~21\)) # (!data(3) & ((\data[2]~21\) # (GND)))
-- \data[3]~23\ = CARRY((!\data[2]~21\) # (!data(3)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => data(3),
	datad => VCC,
	cin => \data[2]~21\,
	combout => \data[3]~22_combout\,
	cout => \data[3]~23\);

-- Location: IOIBUF_X43_Y43_N15
\in_data[3]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_in_data(3),
	o => \in_data[3]~input_o\);

-- Location: FF_X43_Y41_N7
\data[3]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \data[3]~22_combout\,
	asdata => \in_data[3]~input_o\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => \load~input_o\,
	ena => \data[8]~26_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => data(3));

-- Location: LCCOMB_X43_Y41_N8
\data[4]~24\ : cycloneiii_lcell_comb
-- Equation(s):
-- \data[4]~24_combout\ = (data(4) & (\data[3]~23\ $ (GND))) # (!data(4) & (!\data[3]~23\ & VCC))
-- \data[4]~25\ = CARRY((data(4) & !\data[3]~23\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => data(4),
	datad => VCC,
	cin => \data[3]~23\,
	combout => \data[4]~24_combout\,
	cout => \data[4]~25\);

-- Location: IOIBUF_X38_Y43_N15
\in_data[4]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_in_data(4),
	o => \in_data[4]~input_o\);

-- Location: FF_X43_Y41_N9
\data[4]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \data[4]~24_combout\,
	asdata => \in_data[4]~input_o\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => \load~input_o\,
	ena => \data[8]~26_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => data(4));

-- Location: LCCOMB_X43_Y41_N10
\data[5]~27\ : cycloneiii_lcell_comb
-- Equation(s):
-- \data[5]~27_combout\ = (data(5) & (!\data[4]~25\)) # (!data(5) & ((\data[4]~25\) # (GND)))
-- \data[5]~28\ = CARRY((!\data[4]~25\) # (!data(5)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => data(5),
	datad => VCC,
	cin => \data[4]~25\,
	combout => \data[5]~27_combout\,
	cout => \data[5]~28\);

-- Location: IOIBUF_X41_Y43_N1
\in_data[5]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_in_data(5),
	o => \in_data[5]~input_o\);

-- Location: FF_X43_Y41_N11
\data[5]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \data[5]~27_combout\,
	asdata => \in_data[5]~input_o\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => \load~input_o\,
	ena => \data[8]~26_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => data(5));

-- Location: LCCOMB_X43_Y41_N12
\data[6]~29\ : cycloneiii_lcell_comb
-- Equation(s):
-- \data[6]~29_combout\ = (data(6) & (\data[5]~28\ $ (GND))) # (!data(6) & (!\data[5]~28\ & VCC))
-- \data[6]~30\ = CARRY((data(6) & !\data[5]~28\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010010100001010",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => data(6),
	datad => VCC,
	cin => \data[5]~28\,
	combout => \data[6]~29_combout\,
	cout => \data[6]~30\);

-- Location: IOIBUF_X43_Y43_N8
\in_data[6]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_in_data(6),
	o => \in_data[6]~input_o\);

-- Location: FF_X43_Y41_N13
\data[6]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \data[6]~29_combout\,
	asdata => \in_data[6]~input_o\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => \load~input_o\,
	ena => \data[8]~26_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => data(6));

-- Location: LCCOMB_X43_Y41_N14
\data[7]~31\ : cycloneiii_lcell_comb
-- Equation(s):
-- \data[7]~31_combout\ = (data(7) & (!\data[6]~30\)) # (!data(7) & ((\data[6]~30\) # (GND)))
-- \data[7]~32\ = CARRY((!\data[6]~30\) # (!data(7)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110000111111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => data(7),
	datad => VCC,
	cin => \data[6]~30\,
	combout => \data[7]~31_combout\,
	cout => \data[7]~32\);

-- Location: IOIBUF_X45_Y43_N29
\in_data[7]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_in_data(7),
	o => \in_data[7]~input_o\);

-- Location: FF_X43_Y41_N15
\data[7]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \data[7]~31_combout\,
	asdata => \in_data[7]~input_o\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => \load~input_o\,
	ena => \data[8]~26_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => data(7));

-- Location: LCCOMB_X43_Y41_N16
\data[8]~33\ : cycloneiii_lcell_comb
-- Equation(s):
-- \data[8]~33_combout\ = (data(8) & (\data[7]~32\ $ (GND))) # (!data(8) & (!\data[7]~32\ & VCC))
-- \data[8]~34\ = CARRY((data(8) & !\data[7]~32\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => data(8),
	datad => VCC,
	cin => \data[7]~32\,
	combout => \data[8]~33_combout\,
	cout => \data[8]~34\);

-- Location: IOIBUF_X43_Y43_N22
\in_data[8]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_in_data(8),
	o => \in_data[8]~input_o\);

-- Location: FF_X43_Y41_N17
\data[8]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \data[8]~33_combout\,
	asdata => \in_data[8]~input_o\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => \load~input_o\,
	ena => \data[8]~26_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => data(8));

-- Location: LCCOMB_X43_Y41_N18
\data[9]~35\ : cycloneiii_lcell_comb
-- Equation(s):
-- \data[9]~35_combout\ = (data(9) & (!\data[8]~34\)) # (!data(9) & ((\data[8]~34\) # (GND)))
-- \data[9]~36\ = CARRY((!\data[8]~34\) # (!data(9)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110000111111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => data(9),
	datad => VCC,
	cin => \data[8]~34\,
	combout => \data[9]~35_combout\,
	cout => \data[9]~36\);

-- Location: IOIBUF_X43_Y43_N1
\in_data[9]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_in_data(9),
	o => \in_data[9]~input_o\);

-- Location: FF_X43_Y41_N19
\data[9]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \data[9]~35_combout\,
	asdata => \in_data[9]~input_o\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => \load~input_o\,
	ena => \data[8]~26_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => data(9));

-- Location: LCCOMB_X43_Y41_N20
\data[10]~37\ : cycloneiii_lcell_comb
-- Equation(s):
-- \data[10]~37_combout\ = (data(10) & (\data[9]~36\ $ (GND))) # (!data(10) & (!\data[9]~36\ & VCC))
-- \data[10]~38\ = CARRY((data(10) & !\data[9]~36\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => data(10),
	datad => VCC,
	cin => \data[9]~36\,
	combout => \data[10]~37_combout\,
	cout => \data[10]~38\);

-- Location: IOIBUF_X45_Y43_N8
\in_data[10]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_in_data(10),
	o => \in_data[10]~input_o\);

-- Location: FF_X43_Y41_N21
\data[10]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \data[10]~37_combout\,
	asdata => \in_data[10]~input_o\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => \load~input_o\,
	ena => \data[8]~26_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => data(10));

-- Location: LCCOMB_X43_Y41_N22
\data[11]~39\ : cycloneiii_lcell_comb
-- Equation(s):
-- \data[11]~39_combout\ = (data(11) & (!\data[10]~38\)) # (!data(11) & ((\data[10]~38\) # (GND)))
-- \data[11]~40\ = CARRY((!\data[10]~38\) # (!data(11)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => data(11),
	datad => VCC,
	cin => \data[10]~38\,
	combout => \data[11]~39_combout\,
	cout => \data[11]~40\);

-- Location: IOIBUF_X45_Y43_N22
\in_data[11]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_in_data(11),
	o => \in_data[11]~input_o\);

-- Location: FF_X43_Y41_N23
\data[11]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \data[11]~39_combout\,
	asdata => \in_data[11]~input_o\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => \load~input_o\,
	ena => \data[8]~26_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => data(11));

-- Location: LCCOMB_X43_Y41_N24
\data[12]~41\ : cycloneiii_lcell_comb
-- Equation(s):
-- \data[12]~41_combout\ = (data(12) & (\data[11]~40\ $ (GND))) # (!data(12) & (!\data[11]~40\ & VCC))
-- \data[12]~42\ = CARRY((data(12) & !\data[11]~40\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => data(12),
	datad => VCC,
	cin => \data[11]~40\,
	combout => \data[12]~41_combout\,
	cout => \data[12]~42\);

-- Location: IOIBUF_X45_Y43_N15
\in_data[12]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_in_data(12),
	o => \in_data[12]~input_o\);

-- Location: FF_X43_Y41_N25
\data[12]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \data[12]~41_combout\,
	asdata => \in_data[12]~input_o\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => \load~input_o\,
	ena => \data[8]~26_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => data(12));

-- Location: LCCOMB_X43_Y41_N26
\data[13]~43\ : cycloneiii_lcell_comb
-- Equation(s):
-- \data[13]~43_combout\ = (data(13) & (!\data[12]~42\)) # (!data(13) & ((\data[12]~42\) # (GND)))
-- \data[13]~44\ = CARRY((!\data[12]~42\) # (!data(13)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011111",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => data(13),
	datad => VCC,
	cin => \data[12]~42\,
	combout => \data[13]~43_combout\,
	cout => \data[13]~44\);

-- Location: IOIBUF_X38_Y43_N8
\in_data[13]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_in_data(13),
	o => \in_data[13]~input_o\);

-- Location: FF_X43_Y41_N27
\data[13]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \data[13]~43_combout\,
	asdata => \in_data[13]~input_o\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => \load~input_o\,
	ena => \data[8]~26_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => data(13));

-- Location: LCCOMB_X43_Y41_N28
\data[14]~45\ : cycloneiii_lcell_comb
-- Equation(s):
-- \data[14]~45_combout\ = (data(14) & (\data[13]~44\ $ (GND))) # (!data(14) & (!\data[13]~44\ & VCC))
-- \data[14]~46\ = CARRY((data(14) & !\data[13]~44\))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1100001100001100",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	datab => data(14),
	datad => VCC,
	cin => \data[13]~44\,
	combout => \data[14]~45_combout\,
	cout => \data[14]~46\);

-- Location: IOIBUF_X45_Y43_N1
\in_data[14]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_in_data(14),
	o => \in_data[14]~input_o\);

-- Location: FF_X43_Y41_N29
\data[14]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \data[14]~45_combout\,
	asdata => \in_data[14]~input_o\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => \load~input_o\,
	ena => \data[8]~26_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => data(14));

-- Location: LCCOMB_X42_Y41_N20
\u_display|Mux1~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \u_display|Mux1~0_combout\ = (\u_display|sel\(1) & ((\u_display|sel\(0)) # ((data(6))))) # (!\u_display|sel\(1) & (!\u_display|sel\(0) & ((data(14)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011100110101000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \u_display|sel\(1),
	datab => \u_display|sel\(0),
	datac => data(6),
	datad => data(14),
	combout => \u_display|Mux1~0_combout\);

-- Location: LCCOMB_X42_Y41_N10
\u_display|Mux1~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \u_display|Mux1~1_combout\ = (\u_display|Mux1~0_combout\ & ((data(2)) # ((!\u_display|sel\(0))))) # (!\u_display|Mux1~0_combout\ & (((data(10) & \u_display|sel\(0)))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1011100011001100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => data(2),
	datab => \u_display|Mux1~0_combout\,
	datac => data(10),
	datad => \u_display|sel\(0),
	combout => \u_display|Mux1~1_combout\);

-- Location: LCCOMB_X42_Y41_N8
\u_display|sel[2]~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \u_display|sel[2]~0_combout\ = \u_display|sel\(2) $ (((\u_display|sel\(0) & \u_display|sel\(1))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0011110011110000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datab => \u_display|sel\(0),
	datac => \u_display|sel\(2),
	datad => \u_display|sel\(1),
	combout => \u_display|sel[2]~0_combout\);

-- Location: FF_X42_Y41_N9
\u_display|sel[2]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \u_display|sel[2]~0_combout\,
	clrn => \rst~inputclkctrl_outclk\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => \u_display|sel\(2));

-- Location: LCCOMB_X43_Y42_N10
\u_display|Mux1~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \u_display|Mux1~2_combout\ = (\u_display|Mux1~1_combout\ & \u_display|sel\(2))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \u_display|Mux1~1_combout\,
	datad => \u_display|sel\(2),
	combout => \u_display|Mux1~2_combout\);

-- Location: LCCOMB_X42_Y41_N30
\u_display|Mux3~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \u_display|Mux3~0_combout\ = (\u_display|sel\(1) & (\u_display|sel\(0))) # (!\u_display|sel\(1) & ((\u_display|sel\(0) & (data(8))) # (!\u_display|sel\(0) & ((data(12))))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101100111001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \u_display|sel\(1),
	datab => \u_display|sel\(0),
	datac => data(8),
	datad => data(12),
	combout => \u_display|Mux3~0_combout\);

-- Location: LCCOMB_X42_Y41_N28
\u_display|Mux3~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \u_display|Mux3~1_combout\ = (\u_display|sel\(1) & ((\u_display|Mux3~0_combout\ & (data(0))) # (!\u_display|Mux3~0_combout\ & ((data(4)))))) # (!\u_display|sel\(1) & (((\u_display|Mux3~0_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1101110110100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \u_display|sel\(1),
	datab => data(0),
	datac => data(4),
	datad => \u_display|Mux3~0_combout\,
	combout => \u_display|Mux3~1_combout\);

-- Location: LCCOMB_X42_Y41_N2
\u_display|Mux3~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \u_display|Mux3~2_combout\ = (\u_display|Mux3~1_combout\ & \u_display|sel\(2))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \u_display|Mux3~1_combout\,
	datad => \u_display|sel\(2),
	combout => \u_display|Mux3~2_combout\);

-- Location: LCCOMB_X43_Y41_N30
\data[15]~47\ : cycloneiii_lcell_comb
-- Equation(s):
-- \data[15]~47_combout\ = data(15) $ (\data[14]~46\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0101101001011010",
	sum_lutc_input => "cin")
-- pragma translate_on
PORT MAP (
	dataa => data(15),
	cin => \data[14]~46\,
	combout => \data[15]~47_combout\);

-- Location: IOIBUF_X38_Y43_N29
\in_data[15]~input\ : cycloneiii_io_ibuf
-- pragma translate_off
GENERIC MAP (
	bus_hold => "false",
	simulate_z_as => "z")
-- pragma translate_on
PORT MAP (
	i => ww_in_data(15),
	o => \in_data[15]~input_o\);

-- Location: FF_X43_Y41_N31
\data[15]\ : dffeas
-- pragma translate_off
GENERIC MAP (
	is_wysiwyg => "true",
	power_up => "low")
-- pragma translate_on
PORT MAP (
	clk => \clk~inputclkctrl_outclk\,
	d => \data[15]~47_combout\,
	asdata => \in_data[15]~input_o\,
	clrn => \rst~inputclkctrl_outclk\,
	sload => \load~input_o\,
	ena => \data[8]~26_combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	q => data(15));

-- Location: LCCOMB_X42_Y41_N12
\u_display|Mux0~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \u_display|Mux0~0_combout\ = (\u_display|sel\(1) & (((\u_display|sel\(0))))) # (!\u_display|sel\(1) & ((\u_display|sel\(0) & (data(11))) # (!\u_display|sel\(0) & ((data(15))))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110111001010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \u_display|sel\(1),
	datab => data(11),
	datac => data(15),
	datad => \u_display|sel\(0),
	combout => \u_display|Mux0~0_combout\);

-- Location: LCCOMB_X42_Y41_N26
\u_display|Mux0~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \u_display|Mux0~1_combout\ = (\u_display|sel\(1) & ((\u_display|Mux0~0_combout\ & ((data(3)))) # (!\u_display|Mux0~0_combout\ & (data(7))))) # (!\u_display|sel\(1) & (((\u_display|Mux0~0_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111010110001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \u_display|sel\(1),
	datab => data(7),
	datac => data(3),
	datad => \u_display|Mux0~0_combout\,
	combout => \u_display|Mux0~1_combout\);

-- Location: LCCOMB_X42_Y41_N4
\u_display|Mux0~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \u_display|Mux0~2_combout\ = (\u_display|Mux0~1_combout\ & \u_display|sel\(2))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \u_display|Mux0~1_combout\,
	datad => \u_display|sel\(2),
	combout => \u_display|Mux0~2_combout\);

-- Location: LCCOMB_X42_Y41_N16
\u_display|Mux2~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \u_display|Mux2~0_combout\ = (\u_display|sel\(1) & (((\u_display|sel\(0))))) # (!\u_display|sel\(1) & ((\u_display|sel\(0) & (data(9))) # (!\u_display|sel\(0) & ((data(13))))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110111001010000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \u_display|sel\(1),
	datab => data(9),
	datac => data(13),
	datad => \u_display|sel\(0),
	combout => \u_display|Mux2~0_combout\);

-- Location: LCCOMB_X42_Y41_N22
\u_display|Mux2~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \u_display|Mux2~1_combout\ = (\u_display|sel\(1) & ((\u_display|Mux2~0_combout\ & ((data(1)))) # (!\u_display|Mux2~0_combout\ & (data(5))))) # (!\u_display|sel\(1) & (((\u_display|Mux2~0_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111010110001000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \u_display|sel\(1),
	datab => data(5),
	datac => data(1),
	datad => \u_display|Mux2~0_combout\,
	combout => \u_display|Mux2~1_combout\);

-- Location: LCCOMB_X43_Y42_N0
\u_display|Mux2~2\ : cycloneiii_lcell_comb
-- Equation(s):
-- \u_display|Mux2~2_combout\ = (\u_display|Mux2~1_combout\ & \u_display|sel\(2))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111000000000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \u_display|Mux2~1_combout\,
	datad => \u_display|sel\(2),
	combout => \u_display|Mux2~2_combout\);

-- Location: LCCOMB_X43_Y42_N8
\u_display|WideOr6~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \u_display|WideOr6~0_combout\ = (\u_display|Mux1~2_combout\ & (!\u_display|Mux2~2_combout\ & (\u_display|Mux3~2_combout\ $ (!\u_display|Mux0~2_combout\)))) # (!\u_display|Mux1~2_combout\ & (\u_display|Mux3~2_combout\ & (\u_display|Mux0~2_combout\ $ 
-- (!\u_display|Mux2~2_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0100000010000110",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \u_display|Mux1~2_combout\,
	datab => \u_display|Mux3~2_combout\,
	datac => \u_display|Mux0~2_combout\,
	datad => \u_display|Mux2~2_combout\,
	combout => \u_display|WideOr6~0_combout\);

-- Location: LCCOMB_X43_Y42_N6
\u_display|WideOr6~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \u_display|WideOr6~1_combout\ = (!\u_display|WideOr6~0_combout\ & \u_display|sel\(2))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \u_display|WideOr6~0_combout\,
	datad => \u_display|sel\(2),
	combout => \u_display|WideOr6~1_combout\);

-- Location: LCCOMB_X43_Y42_N28
\u_display|WideOr5~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \u_display|WideOr5~0_combout\ = (\u_display|Mux0~2_combout\ & ((\u_display|Mux3~2_combout\ & ((\u_display|Mux2~2_combout\))) # (!\u_display|Mux3~2_combout\ & (\u_display|Mux1~2_combout\)))) # (!\u_display|Mux0~2_combout\ & (\u_display|Mux1~2_combout\ & 
-- (\u_display|Mux3~2_combout\ $ (\u_display|Mux2~2_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1110001000101000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \u_display|Mux1~2_combout\,
	datab => \u_display|Mux3~2_combout\,
	datac => \u_display|Mux0~2_combout\,
	datad => \u_display|Mux2~2_combout\,
	combout => \u_display|WideOr5~0_combout\);

-- Location: LCCOMB_X43_Y42_N2
\u_display|WideOr5~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \u_display|WideOr5~1_combout\ = (\u_display|sel\(2) & !\u_display|WideOr5~0_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000010101010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \u_display|sel\(2),
	datad => \u_display|WideOr5~0_combout\,
	combout => \u_display|WideOr5~1_combout\);

-- Location: LCCOMB_X43_Y42_N12
\u_display|WideOr4~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \u_display|WideOr4~0_combout\ = (\u_display|Mux1~2_combout\ & (\u_display|Mux0~2_combout\ & ((\u_display|Mux2~2_combout\) # (!\u_display|Mux3~2_combout\)))) # (!\u_display|Mux1~2_combout\ & (!\u_display|Mux3~2_combout\ & (!\u_display|Mux0~2_combout\ & 
-- \u_display|Mux2~2_combout\)))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1010000100100000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \u_display|Mux1~2_combout\,
	datab => \u_display|Mux3~2_combout\,
	datac => \u_display|Mux0~2_combout\,
	datad => \u_display|Mux2~2_combout\,
	combout => \u_display|WideOr4~0_combout\);

-- Location: LCCOMB_X43_Y42_N22
\u_display|WideOr4~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \u_display|WideOr4~1_combout\ = (\u_display|sel\(2) & !\u_display|WideOr4~0_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000010101010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \u_display|sel\(2),
	datad => \u_display|WideOr4~0_combout\,
	combout => \u_display|WideOr4~1_combout\);

-- Location: LCCOMB_X43_Y42_N24
\u_display|WideOr3~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \u_display|WideOr3~0_combout\ = (\u_display|Mux2~2_combout\ & ((\u_display|Mux1~2_combout\ & (\u_display|Mux3~2_combout\)) # (!\u_display|Mux1~2_combout\ & (!\u_display|Mux3~2_combout\ & \u_display|Mux0~2_combout\)))) # (!\u_display|Mux2~2_combout\ & 
-- (!\u_display|Mux0~2_combout\ & (\u_display|Mux1~2_combout\ $ (\u_display|Mux3~2_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1001100000000110",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \u_display|Mux1~2_combout\,
	datab => \u_display|Mux3~2_combout\,
	datac => \u_display|Mux0~2_combout\,
	datad => \u_display|Mux2~2_combout\,
	combout => \u_display|WideOr3~0_combout\);

-- Location: LCCOMB_X43_Y42_N26
\u_display|WideOr3~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \u_display|WideOr3~1_combout\ = (\u_display|sel\(2) & !\u_display|WideOr3~0_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000010101010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \u_display|sel\(2),
	datad => \u_display|WideOr3~0_combout\,
	combout => \u_display|WideOr3~1_combout\);

-- Location: LCCOMB_X43_Y42_N16
\u_display|WideOr2~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \u_display|WideOr2~0_combout\ = (\u_display|Mux2~2_combout\ & (((\u_display|Mux3~2_combout\ & !\u_display|Mux0~2_combout\)))) # (!\u_display|Mux2~2_combout\ & ((\u_display|Mux1~2_combout\ & ((!\u_display|Mux0~2_combout\))) # (!\u_display|Mux1~2_combout\ & 
-- (\u_display|Mux3~2_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000110001001110",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \u_display|Mux1~2_combout\,
	datab => \u_display|Mux3~2_combout\,
	datac => \u_display|Mux0~2_combout\,
	datad => \u_display|Mux2~2_combout\,
	combout => \u_display|WideOr2~0_combout\);

-- Location: LCCOMB_X43_Y42_N14
\u_display|WideOr2~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \u_display|WideOr2~1_combout\ = (\u_display|sel\(2) & !\u_display|WideOr2~0_combout\)

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000000010101010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \u_display|sel\(2),
	datad => \u_display|WideOr2~0_combout\,
	combout => \u_display|WideOr2~1_combout\);

-- Location: LCCOMB_X43_Y42_N4
\u_display|WideOr1~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \u_display|WideOr1~0_combout\ = (\u_display|Mux1~2_combout\ & (\u_display|Mux3~2_combout\ & (\u_display|Mux0~2_combout\ $ (\u_display|Mux2~2_combout\)))) # (!\u_display|Mux1~2_combout\ & (!\u_display|Mux0~2_combout\ & ((\u_display|Mux3~2_combout\) # 
-- (\u_display|Mux2~2_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000110110000100",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \u_display|Mux1~2_combout\,
	datab => \u_display|Mux3~2_combout\,
	datac => \u_display|Mux0~2_combout\,
	datad => \u_display|Mux2~2_combout\,
	combout => \u_display|WideOr1~0_combout\);

-- Location: LCCOMB_X43_Y42_N18
\u_display|WideOr1~1\ : cycloneiii_lcell_comb
-- Equation(s):
-- \u_display|WideOr1~1_combout\ = (!\u_display|WideOr1~0_combout\ & \u_display|sel\(2))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "0000111100000000",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	datac => \u_display|WideOr1~0_combout\,
	datad => \u_display|sel\(2),
	combout => \u_display|WideOr1~1_combout\);

-- Location: LCCOMB_X43_Y42_N20
\u_display|WideOr0~0\ : cycloneiii_lcell_comb
-- Equation(s):
-- \u_display|WideOr0~0_combout\ = (\u_display|Mux3~2_combout\ & ((\u_display|Mux0~2_combout\) # (\u_display|Mux1~2_combout\ $ (\u_display|Mux2~2_combout\)))) # (!\u_display|Mux3~2_combout\ & ((\u_display|Mux2~2_combout\) # (\u_display|Mux1~2_combout\ $ 
-- (\u_display|Mux0~2_combout\))))

-- pragma translate_off
GENERIC MAP (
	lut_mask => "1111011111011010",
	sum_lutc_input => "datac")
-- pragma translate_on
PORT MAP (
	dataa => \u_display|Mux1~2_combout\,
	datab => \u_display|Mux3~2_combout\,
	datac => \u_display|Mux0~2_combout\,
	datad => \u_display|Mux2~2_combout\,
	combout => \u_display|WideOr0~0_combout\);

ww_seg(0) <= \seg[0]~output_o\;

ww_seg(1) <= \seg[1]~output_o\;

ww_seg(2) <= \seg[2]~output_o\;

ww_seg(3) <= \seg[3]~output_o\;

ww_seg(4) <= \seg[4]~output_o\;

ww_seg(5) <= \seg[5]~output_o\;

ww_seg(6) <= \seg[6]~output_o\;

ww_seg(7) <= \seg[7]~output_o\;

ww_sel(0) <= \sel[0]~output_o\;

ww_sel(1) <= \sel[1]~output_o\;

ww_sel(2) <= \sel[2]~output_o\;
END structure;


